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MITSUBISHI STORAGE CARD
CompactFlash CARDS
8/16-bit Data Bus CompactFlash Card
MF0064M-04BAxx MF0128M-04BAXX
Connector Type
Two-piece 50-pin
DESCRIPTION
Mitsubishi's CompactFlashTM cards provide large memory capacities on a device approximately the size of a match box (36.4mmx42.8mmx3.3mm). The cards use an 8/16 bit data bus. Available in 64MB and 128MB capacities, Mitsubishi's CompactFlash cards conform to the CompactFlash Specification released from CompactFlash Association. Using with the 68-pin adapter card, Mitsubishi's CompactFlash card operates in PC Card compliant sockets. It conforms to PCMCIA2.1, JEIDA4.2 and PC Card Standard. When the OE# signal is asserted low level by the Host system in power on cycle, the Mitsubishi's CompactFlash cards can be selected in a True IDE interface. It uses the ATA command set so no software drivers are required.
FEATURES
* Single 5V or 3.3V Supply * Card density of up to 128MB maximum * Four PC Card ATA and True IDE modes * Nonvolatile, No Batteries Required * High reliability based on internal ECC function * Fast read/write performance(Target)
Read: 2.0MB/s(max.) Write: 900KB/s(max.) (64MB) 1.0MB/s(max.) (128MB)
* 100,000 program/erase cycles
APPLICATIONS
* Computers * Digital Camera * Data Communication * Office Automation * Industrial * Consumer
*CompactFlash is a trademarks of SanDisk Corporation.
PRODUCT LIST
Memory capacity (Bytes) 64,094,208 128,057,344 Data Bus width(bits) 8/16 Memory 256Mbit Flash x 2 256Mbit Flash x 4 Cylinder 978 977 Head 4 8 Sector 32 32 Out line Type I
MF0064M-04BAxx MF0128M-04BAXX
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 1/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS PIN ASSIGNMENT
Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 PC Card Memory Mode Signal I/O GND D3 D4 D5 D6 D7 CE1# A10 OE# A9 A8 A7 Vcc A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 WP CD2# I/O I/O I/O I/O I/O I I I I I I I I I I I I I I/O I/O I/O O O PC Card I/O Mode Signal I/O GND D3 D4 D5 D6 D7 CE1# A10 OE# A9 A8 A7 Vcc A6 A5 A4 A3 A2 A1 A0 D0 D1 D2 IOIS16# CD2# I/O I/O I/O I/O I/O I I I I I I I I I I I I I I/O I/O I/O O O True IDE Interface Pin Signal GND D3 D4 D5 D6 D7 CS0# N.U ATA SEL# N.U N.U N.U Vcc N.U N.U N.U N.U A2 A1 A0 D0 D1 D2 IOCS16# CD2# I/O I/O I/O I/O I/O I/O I I I I I I/O I/O I/O O O 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 PC Card Memory Mode Signal I/O CD1# D11 D12 D13 D14 D15 CE2# VS1# N.U N.U WE# READY Vcc CSEL VS2# RESET WAIT# N.U REG# BVD2 BVD1 D8 D9 D10 GND O I/O I/O I/O I/O I/O I O I O I O I O I O O I/O I/O I/O PC Card I/O Mode Signal I/O CD1# D11 D12 D13 D14 D15 CE2# VS1# IORD# IOWR# WE# IREQ# Vcc CSEL VS2# RESET WAIT# INPACK# REG# SPKR# STSCHG# D8 D9 D10 GND O I/O I/O I/O I/O I/O I O I I I O I O I O O I O O I/O I/O I/O True IDE Interface Signal I/O CD1# D11 D12 D13 D14 D15 CS1# VS1# IORD# IOWR# WE# INTRQ Vcc CSEL VS2# RESET# IORDY INPACK# REG# DASP# PDIAG# D8 D9 D10 GND O I/O I/O I/O I/O I/O I O I I I O I O I O O I I/O I/O I/O I/O I/O -
N.U = Not used.
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 2/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS Signal Description
Signal Name Address bus[A10-A0] I/O I Pin No. 8, 10, 11, 12, 14, 15, 16, 17, 18, 19, 20 31, 30, 29, 28, 27, 49, 48, 47, 6, 5, 4, 3, 2, 23, 22, 21 7, 32 Description Signals A10-A0 are address bus. A0 is invalid in word mode. A10 is the MSB and A0 is the LSB. Signals D15-D0 are data bus. D0 is the LSB of the Even Byte of the Word. D8 is the LSB of the Odd Byte of the Word. CE1# and CE2# are low active card select signals.
Data bus[D15-D0]
I/O
Card Enable[CE1#, CE2#] (PC Card Memory Mode) Card Enable[CE1#, CE2#] (PC Card I/O Mode) Chip Select[CS0#, CS1#] (True IDE Interface) Output Enable[OE#] (PC Card Memory Mode) Output Enable[OE#] (PC Card I/O Mode) ATA SEL# (True IDE Interface) Write Enable[WE#] (PC Card Memory Mode) Write Enable[WE#] (PC Card I/O Mode) Write Enable[WE#] (True IDE Interface) I/O Read[IORD#] (PC Card I/O Mode) I/O Read[IORD#] (True IDE Interface) I/O Write[IOWR#] (PC Card I/O Mode) I/O Write[IOWR#] (True IDE Interface) Ready[READY] (PC Card Memory Mode) IREQ# (PC Card I/O Mode) INTRQ (True IDE Interface) Card Detection[CD1#, CD2#] Write Protect[WP] (PC Card Memory Mode) IOIS16# (PC Card I/O Mode) IOCS16# (True IDE Interface)
I
I
9
I
36
In True IDE Interface, CS0# is used to select the Command Block Registers. CS1# is used to select the Control Block Registers. OE# is used to gate Attribute and Common Memory Read data from the Card. OE# is used to gate Attribute Memory Read data from the Card. To enable True IDE Interface, this input should be grounded by the host. WE# is used for strobing Attribute and Common Memory Write data into the Card. WE# is used for strobing Attribute Memory Write data into the Card. This input should be connected Vcc by the host. IORD# is used to read data from the Card's I/O space.
I
34
I
35
IOWR# is used to write data to the Card's I/O space.
O
37
O O
26, 25 24
READY signal is set high when the Card is ready to accept a new data transfer operation. This signal of low level is indicates that the card is requesting software service to host, and high level indicates that the card is not requesting. This signal is active high interrupt request to the host. CD1# and CD2# provided for proper detection of Card insertion. This signal is held low because this card does not have a write protect switch. This output signal is asserted when the I/O port address is capable of 16-bit access.
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 3/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS Signal Description(Continued)
Signal Name Attribute Memory Select[REG#] (PC Card Memory Mode) Attribute Memory Select[REG#] (PC Card I/O Mode) Attribute Memory Select[REG#] (True IDE Interface) Battery Voltage Detect[BVD2] (PC Card Memory Mode) Audio Digital Waveform[SPKR#] (PC Card I/O Mode) DASP# (True IDE Interface) Card Reset[RESET] (PC Card Memory Mode) Card Reset[RESET] (PC Card I/O Mode) Card Reset[RESET#] (True IDE Interface) Wait[WAIT#] (PC card Memory Mode) Wait[WAIT#] (PC card I/O Mode) IORDY (True IDE Interface) Input Port Acknowledge[INPACK#] (PC Card I/O Mode) Input Port Acknowledge[INPACK#] (True IDE Interface) Battery Voltage Detect[BVD1] (PC Card Memory Mode) STSCHG# (PC Card I/O Mode) PDIAG# (True IDE Interface) Voltage Sense[VS1, VS2] Cable Select[CSEL] (PC Card Memory Mode) Cable Select[CSEL] (PC Card I/O Mode) Cable Select[CSEL] (True IDE Interface) I/O I Pin No. 44 Description When this signal is asserted, access is limited to Attribute Memory with OE#/WE# and I/O Space with IORD#/IOWR#. This input signal is not used for this mode and should be connected to Vcc by the host. This output is driven to a high-level. SPKR# is kept negated because this Card does not have digital audio output. This signal is the DISK Active/Slave Present signal in the Master/Slave handshake protocol. By assertion of this signal, all registers of this Card are cleared. This signal should be kept to High-Z by the host for at least 1ms after Vcc applied. This input pin is the active low hardware reset from the host. This signal is asserted to delay completion of the memory or I/O access cycle.
O
45
I/O I 41
O
42
O
43
O
46
This signal is asserted when the Card is selected and can respond to an I/O Read cycle at the address on the address bus. This signal is not used for this mode and should not be connected at the host. This output is driven to a high-level. This signal is asserted low to alert the host to changes in the status of Configuration Status Register in the Attribute Memory Space. This signal is the Pass Diagnostic signal in the Master/Slave handshake protocol. VS1 is grounded so that the Card CIS can be read at 3.3V and VS2 is N.C. This signal is not used for this mode.
I/O O I 33, 40 39
Vcc GND
-
13, 38 1, 50
This signal is used to configure this Card as a Master or a Slave. When this signal is grounded, this Card is configured as a Master. When this signal is Open, this Card is configured as a Slave. 5V or 3.3V power. Ground.
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 4/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS BLOCK DIAGRAM
Vcc GND
Internal Vcc
Controller A10-A0 CE1#/CS0# CE2#/CS1# OE#/ATA SEL# WE# IORD# IOWR# REG# RESET/RESET# D15-D0 READY/IREQ#/INTRQ WP/IOIS16#/IOCS16# INPACK# BVD1/STSCHG#/PDIAG# BVD2/SPKR#/DASP# WAIT#/IORDY CSEL VS1 VS2 CD1# CD2# Open POR# RESET Circuit
RES# CE# OE# WE# CDE# SC I/O7-I/O0 R/B# XIN XOUT Resonator
64Mbit AND 256Mbit AND Flash Memory Flash Memory (x14) (x4:128MB)
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 5/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS FUNCTION TABLE
Function Standby Byte Access Word Access Odd Byte Standby Byte Access Word Access Odd Byte Standby Byte Access Word Access Odd Byte Standby Byte Access Word Access Odd Byte Standby Byte Access Word Access Odd Byte Standby Byte Access Word Access Odd Byte REG# X L L L L X L L L L X H H H H X H H H H X L L L L X L L L L CE2# H H H L L H H H L L H H H L L H H H L L H H H L L H H H L L CE1# H L L L H H L L L H H L L L H H L L L H H L L L H H L L L H A0 X L H X X X L H X X X L H X X X L H X X X L H X X X L H X X OE# X L L L L X H H H H X L L L L X H H H H X H H H H X H H H H WE# X H H H H X L L L L X H H H H X L L L L X H H H H X H H H H IORD# X H H H H X H H H H X H H H H X H H H H X L L L L X H H H H IOWR# X H H H H X H H H H X H H H H X H H H H X H H H H X L L L L D15-D8 High-Z High-Z High-Z Invalid Invalid don't care don't care don't care don't care don't care High-Z High-Z High-Z Odd Byte Odd Byte don't care don't care don't care Odd Byte Odd Byte High-Z High-Z High-Z Odd Byte Odd Byte don't care don't care don't care Odd Byte Odd Byte D7-D0 High-Z Even Byte Invalid Even Byte High-Z don't care Even Byte don't care Even Byte don't care High-Z Even Byte Odd Byte Even Byte High-Z don't care Even Byte Odd Byte Even Byte don't care High-Z Even Byte Odd Byte Even Byte High-Z don't care Even Byte Odd Byte Even Byte don't care
Attribute Memory Read Function
Attribute Memory Write Function
Common Memory Read Function
Common Memory Write Function
I/O Read Function
I/O Write Function
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 6/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS Memory mapped mode(Index=0)
REG# CE2# CE1# A10 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 A9-A4 A3 x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x x 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 x x x x A2 A1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 x x x x 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 x x x x A0 x 0 1 x x 0 1 x x 0 1 x x 0 1 x x 0 1 x x 0 1 x x 0 1 x x 0 1 x OE#="L" Data Register(D15-D0) Data Register[Even, Odd](D7-D0) Error Register(D7-D0) Error Register(D15-D8) Sector Count Register(D7-D0) Sector Number Register(D15-D8) Sector Count Register(D7-D0) Sector Number Register(D7-D0) Sector Number Register(D15-D8) Cylinder Low Register(D7-D0) Cylinder High Register(D15-D8) Cylinder Low Register(D7-D0) Cylinder High Register(D7-D0) Cylinder High Register(D15-D8) Drive Head Register(D7-D0) Status Register(D15-D8) Drive Head Register(D7-D0) Status Register(D7-D0) Status Register(D15-D8) Data Register(D15-D0) Data Register[Even, Odd](D7-D0) Data Register[Odd](D7-D0) Data Register[Odd](D15-D8) invalid(D7-D0) Error Register(D15-D8) invalid Error Register(D7-D0) Error Register(D15-D8) Alt. Status Register(D7-D0) Drive Address Register(D15-D8) Alt. Status Register(D7-D0) Drive Address Register(D7-D0) Drive Address Register(D15-D8) Data Register(D15-D0) Data Register[Even, Odd](D7-D0) Data Register[Odd](D7-D0) Data Register[Odd](D15-D8) Register WE#="L" Data Register(D15-D0) Data Register[Even, Odd](D7-D0) Feature Register(D7-D0) Feature Register(D15-D8) Sector Count Register(D7-D0) Sector Number Register(D15-D8) Sector Count Register(D7-D0) Sector Number Register(D7-D0) Sector Number Register(D15-D8) Cylinder Low Register(D7-D0) Cylinder High Register(D15-D8) Cylinder Low Register(D7-D0) Cylinder High Register(D7-D0) Cylinder High Register(D15-D8) Drive Head Register(D7-D0) Command Register(D15-D8) Drive Head Register(D7-D0) Command Register(D7-D0) Command Register(D15-D8) Data Register(D15-D0) Data Register[Even, Odd](D7-D0) Data Register[Odd](D7-D0) Data Register[Odd](D15-D8) invalid(D7-D0) Feature Register(D15-D8) invalid Feature Register(D7-D0) Feature Register(D15-D8) Device Control Register(D7-D0) invalid Device Control Register(D7-D0) invalid invalid Data Register(D15-D0) Data Register[Even, Odd](D7-D0) Data Register[Odd](D7-D0) Data Register[Odd](D15-D8)
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 7/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS Contiguous I/O Map(Index=1)
REG# 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 CE2# 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 CE1# 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 A9-A4 x x x x x x x x x x x x x x x x x x x x x x x x x x x x A3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 A2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 A1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 A0 x 0 1 x 0 0 1 x 0 0 1 x 0 0 1 x x 0 1 x 0 0 1 x 0 0 1 x Register IORD#="L" IOWR#="L" Data Register(D15-D0) Data Register(D15-D0) Data Register[Even, Odd](D7-D0) Data Register[Even, Odd](D7-D0) Error Register(D7-D0) Feature Register(D7-D0) Error Register(D15-D8) Feature Register(D15-D8) Sector Count Register(D7-D0) Sector Count Register(D7-D0) Sector Number Register(D15-D8) Sector Number Register(D15-D8) Sector Count Register(D7-D0) Sector Count Register(D7-D0) Sector Number Register(D7-D0) Sector Number Register(D7-D0) Sector Number Register(D15-D8) Sector Number Register(D15-D8) Cylinder Low Register(D7-D0) Cylinder Low Register(D7-D0) Cylinder High Register(D15-D8) Cylinder High Register(D15-D8) Cylinder Low Register(D7-D0) Cylinder Low Register(D7-D0) Cylinder High Register(D7-D0) Cylinder High Register(D7-D0) Cylinder High Register(D15-D8) Cylinder High Register(D15-D8) Drive Head Register(D7-D0) Drive Head Register(D7-D0) Status Register(D15-D8) Command Register(D15-D8) Drive Head Register(D7-D0) Drive Head Register(D7-D0) Status Register(D7-D0) Command Register(D7-D0) Status Register(D15-D8) Command Register(D15-D8) Data Register(D15-D0) Data Register(D15-D0) Data Register[Even, Odd](D7-D0) Data Register[Even, Odd](D7-D0) Data Register[Odd](D7-D0) Data Register[Odd](D7-D0) Data Register[Odd](D15-D8) Data Register[Odd](D15-D8) invalid(D7-D0) invalid(D7-D0) Error Register(D15-D8) Feature Register(D15-D8) invalid invalid Error Register(D7-D0) Feature Register(D7-D0) Error Register(D15-D8) Feature Register(D15-D8) Alt. Status Register(D7-D0) Device Control Register(D7-D0) Drive Address Register(D15-D8) invalid Alt. Status Register(D7-D0) Device Control Register(D7-D0) Drive Address Register(D7-D0) invalid Drive Address Register(D15-D8) invalid
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 8/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS Primary(Secondary) I/O(Index=2, 3)
REG# CE2# CE1# 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 0 0 0 1 A9-A4 1Fh(17h) 1Fh(17h) 1Fh(17h) 1Fh(17h) 1Fh(17h) 1Fh(17h) 1Fh(17h) 1Fh(17h) 1Fh(17h) 1Fh(17h) 1Fh(17h) 1Fh(17h) 1Fh(17h) 1Fh(17h) 1Fh(17h) 1Fh(17h) 3Fh(37h) 3Fh(37h) 3Fh(37h) 3Fh(37h) A3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 A2 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 A1 A0 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 1 1 1 1 x 0 1 x 0 0 1 x 0 0 1 x 0 0 1 x 0 0 1 x IORD#="L" Data Register(D15-D0) Data Register[Even, Odd](D7-D0) Error Register(D7-D0) Error Register(D15-D8) Sector Count Register(D7-D0) Sector Number Register(D15-D8) Sector Count Register(D7-D0) Sector Number Register(D7-D0) Sector Number Register(D15-D8) Cylinder Low Register(D7-D0) Cylinder High Register(D15-D8) Cylinder Low Register(D7-D0) Cylinder High Register(D7-D0) Cylinder High Register(D15-D8) Drive Head Register(D7-D0) Status Register(D15-D8) Drive Head Register(D7-D0) Status Register(D7-D0) Status Register(D15-D8) Alt. Status Register(D7-D0) Drive Address Register(D15-D8) Alt. Status Register(D7-D0) Drive Address Register(D7-D0) Drive Address Register(D15-D8) Register IOWR#="L" Data Register(D15-D0) Data Register[Even, Odd](D7-D0) Feature Register(D7-D0) Feature Register(D15-D8) Sector Count Register(D7-D0) Sector Number Register(D15-D8) Sector Count Register(D7-D0) Sector Number Register(D7-D0) Sector Number Register(D15-D8) Cylinder Low Register(D7-D0) Cylinder High Register(D15-D8) Cylinder Low Register(D7-D0) Cylinder High Register(D7-D0) Cylinder High Register(D15-D8) Drive Head Register(D7-D0) Command Register(D15-D8) Drive Head Register(D7-D0) Command Register(D7-D0) Command Register(D15-D8) Device Control Register(D7-D0) invalid Device Control Register(D7-D0) invalid invalid
True IDE Interface
CS1# 1 1 1 1 1 1 1 1 0 0 CS0# 0 0 0 0 0 0 0 0 1 1 A2-A0 0h 1h 2h 3h 4h 5h 6h 7h 6h 7h IORD#="L" Data Register(D15-D0) Error Register(D7-D0) Sector Count Register(D7-D0) Sector Number Register(D7-D0) Cylinder Low Register(D7-D0) Cylinder High Register(D7-D0) Drive Head Register(D7-D0) Status Register(D7-D0) Alt. Status Register(D7-D0) Drive Address Register(D7-D0) Register IOWR#="L" Data Register(D15-D0) Feature Register(D7-D0) Sector Count Register(D7-D0) Sector Number Register(D7-D0) Cylinder Low Register(D7-D0) Cylinder High Register(D7-D0) Drive Head Register(D7-D0) Command Register(D7-D0) Device Control Register(D7-D0) invalid
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 9/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS Configuration Register Specifications Configuration Option Register
This register is used for the configuration of the card configuration status and for the issuing soft reset to the card.
D7 SRESET Name SRESET D6 LevIREQ R/W R/W D5 D4 D3 D2 Index D1 D0 Name CREADY R/W R/W Description This bit is set to "1" when the RREADY bit changes state. This bit may also be written by the host. When read, this bit indicates READY pin states. When written, this bit acts as a mask for writing the CREADY bit.
Pin Replacement Register
This register is used for providing the signal state of READY signal when the card configured I/O card interface.
D7 0 D6 0 D5 CREADY D4 0 D3 1 D2 1 D1 RREADY D0 0
LevIREQ
R/W
Index
R/W
Description Setting this bit to "1", places the card in the reset state. When the host returns this bit to "0", the function shall enter the same unconfigured, reset state as the card does following a power-up and hardware reset. If this bit is set to "0", card generates pulse mode interrupt. If this bit is set to "1", card generates level mode interrupts. This bits is used for select operation mode of the card as follows. When Power on, Card Hard Reset and Soft reset, this data is "000000" for the purpose of Memory card interface recognition. Index: 0 -> Memory mapped 1 -> Contiguous I/O mapped 2 -> Primary I/O mapped 3 -> Secondary I/O mapped
RREADY
R/W
Socket and Copy Register
This register is used for identification of the card from the other cards. Host can read and write this register. This register should be set by host before this card's Configuration Option register set.
D7 0 D6 D5 D4 Copy Number R/W R/W D3 D2 D1 Socket Number D0
Configuration and Status Register
This register is used for observing the card state.
D7 Changed Name Changed D6 SigChg R/W R/O D5 Iois8 D4 0 D3 0 D2 PwrDwn D1 Intr D0 0
Name Copy Number
SigChg
R/W
Description This bit indicates that CREADY bit on the Pin Replacement register is set to "1". When Changed bit is set to "1", STSCHG# pin is held "L" if the SigChg bit is "1" and the card is configured for the I/O interface. This bit is set or reset by the host for enabling and disabling the status change signal(STSCHG# pin). When the card is configured I/O card interface and this bit is set to "1", STSCHG# pin is controlled by Changed bit. If this bit is set to "0", STSCHG# pin is kept
"H".
Socket Number
R/W
Description This bit indicates the drive number of the card for twin card configuration. And the host can select and drive one card by comparing the number in this field with the drive number of Drive Head Register. In the way, the host can perform the card's master/slave organization. This field indicates to the card that it is located in the n'th socket.
Iois8 PwrDwn
R/W R/W
Intr
R/W
This card is always configured for both 8-bit and 16-bit I/O, so this bit is ignored. When this bit is set to "1", the card enters Power Down mode. When this bit is reset to "0", the host is requesting the card to enter the active mode. RREADY bit on Pin Replacement Register becomes BUSY when this bit is changed. RREADY will not become Ready until the power state requested has been entered. This card automatically powers down when it is idle, and powers back up when it receives a command. This bit represents the internal state of the interrupt request. This bit state is available whether I/O card interface has been configured or not. This signal remains True until the condition which caused the interrupt request has been serviced. If interrupts are disabled by the nIEN bit in the Device Control Register, this bit is a zero.
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 10/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS CIS Information
CIS informatoins are defined as follows.
Offset 0000h 0002h 0004h 0006h 0008h 000Ah 000Ch 000Eh 0010h 0012h 0014h 0016h 0018h 001Ah 001Ch 001Eh 0020h 0022h 0024h 0026h 0028h 002Ah 002Ch 002Eh 0030h 0032h 0034h 0036h 0038h 003Ah 003Ch 003Eh 0040h 0042h 0044h 0046h 0048h 004Ah 004Ch 004Eh 0050h 0052h 0054h 0056h 0058h 005Ah 005Ch 005Eh 0060h 0062h 0064h Data 01h 03h D9h 01h FFh 1Ch 05h 02h DFh 01h FFh 1Ch 04h 02h D9h 01h FFh 18h 02h DFh 01h 20h 04h 1Ch 00h 01h 00h 15h 1Ch 04h 01h 4Dh 49h 54h 53h 55h 42h 49h 53h 48h 49h 00h 41h 54h 41h 20h 43h 41h 52h 44h 00h 7 6 5 4 3 CISTPL_DEVICE TPL_LINK WPS 2 1 0 Description Common Memory device information Link to next tuple Device Type=Dh : Function specific WPS=1 : No WPS Device Speed=1 : 250ns 2kBytes of address space Other Conditions Device information Link to next tuple EXT=0, Vcc=5.0V, Wait is not used. Device Type=Dh : Function specific WPS=1 : No WPS Device Speed=250ns 2kbytes of address space Other Conditions Device information Link to next tuple EXT=0, Vcc=3.3V, Wait is not used. Device Type=Dh : Function specific WPS=1 : No WPS Device Speed=250ns 2kbytes of address space JEDEC Identifier Tuples Link to next tuple PC Card ATA with no Vpp require for any operation Manufacturer Identification Tuple Link to next tuple 001Ch 0001h Level 1 Version / Product Information Link to next tuple PCMCIA2.0 / JEIDA4.1 PCMCIA2.0 / JEIDA4.1 M I T S U B I S H I A T A C A R D
Device Type
Device Speed 2K
EXT
1x Marks end of Device Info fields CISTPL_DEVICE_OC TPL_LINK Reserved Vcc Device Type WPS
MWAIT
Device Speed
EXT
1x 2K Marks end of Other Conditions Device Info CISTPL_DEVICE_OC TPL_LINK Reserved Vcc Device Type WPS
MWAIT
Device Speed
1x 2K Marks end of Other Conditions Device Info CISTPL_JEDEC_C TPL_LINK JEDEC identifier for first device info entry. JEDEC identifiers for remaining device info entries. CISTPL_MANFID TPL_LINK PC Card manufacturer code manufacturer information CISTPL_VERS_1 TPL_LINK TPLLV1_MAJOR TPLLV1_MINOR TPLLV1_INFO
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 11/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS CIS Information(Continued)
Offset 0066h 0068h 006Ah 006Ch 006Eh 0070h 0072h 0074h 0076h 0078h 007Ah 007Ch 007Eh 0080h 0082h 0084h 0086h 0088h Data 30h 2Eh 31h 31h 00h FFh 21h 02h 04h 01h 22h 02h 01h 01h 22h 03h 02h 04h 7 6 5 4 3 2 1 0 3 . 1 1 Marks end of chain. Function Identification Tuple Link to next tuple PC Card ATA(Fixed Disk) ROM=0 : No BIOS ROM POST=1: Configure card at power on Function Extension Tuple Link to next tuple Disk Interface Type PC Card ATA Interface Function Extension Tuple Link to next tuple Basic PC Card ATA Interface tuple V=0 : No Vpp Required S=1 : Silicon U=0 : ID Drive Mfg/SN not Unique D=0 : Single Drive on Card P0=1 : Sleep Mode Supported P1=1 : Standby Mode Supported P2=1 : Idle Mode Supported P3=1 : Drive Auto Power Control N=0 : No Configs exclude I/O port 3F7H/377H E=0 : Index bit is not emulated I=0 : IOIS16# use is Unspecified on Twin Card Configurations Configuration Tuple Link to next tuple RFS=0 : No Reserved Field RMS=0 : 1 Byte Register Mask RAS=1 : 2 Byte Config Base Address Last Index = 3 Configuration Registers are located at 200H in Reg Space First 4 Configuration Registers present Configuration Table Entry Tuple Link to next tuple Interface Byte Follows, Default Entry, Configuration Index = 0 Mem Interface; Bvd's and wProt not used; Ready active and Wait not used for memory cycles. Has Vcc, Mem Space and Misc Info Nominal Voltage Only Follows Vcc Nominal is 5 Volts Length of Mem Space is 2 KB Starts at 0 on card Power Down, Twin Card supported. Configuration Table Entry Tuple Link to next tuple No Interface Byte, Non Default Entry, Configuration Index = 0 Has Vcc Info Nominal Voltage Only Follows Vcc Nominal is 3.3 Volts Description
CISTPL_FUNCID TPL_LINK Card Function Code Reserved CISTPL_FUNCE TPL_LINK Disk Function Extension Tuple Type Disk Interface Type CISTPL_FUNCE TPL_LINK Disk Function Extension Tuple Type D U S
ROM
POST
RFU
V
008Ah
0Fh
RFU
I
E
N
P3
P2
P1
P0
008Ch 008Eh 0090h
1Ah 05h 01h
RFS
CISTPL_CONF TPL_LINK RMS
RAS
0092h 0094h 0096h 0098h 009Ah 009Ch 009Eh 00A0h
03h 00h 02h 0Fh 1Bh 08h C0h 40h
RFU
RFU
I W
D R
TPCC_LAST TPCC_RADR (lsb) TPCC_RADR (msb) RFU E S P C CISTPL_CFTABLE_ENTRY TPL_LINK Configuration Index P B Interface Type
I
00A2h 00A4h 00A6h 00A8h 00AAh 00ACh 00AEh 00B0h 00B2h 00B4h 00B6h 00B8h 00BAh
A1h 01h 55h 08h 00h 21h 1Bh 05h 00h 01h 01h B5h 1Eh
M R X
MS DI
X
RFU
I M R X
D MS DI
IR IO T P PI AI SI HV LV NV Mantissa Exponent Length in 256 bytes pages (lsb) Length in 256 bytes pages (msb) P RO A T CISTPL_CFTABLE_ENTRY TPL_LINK Configuration Index IR IO PI AI SI Mantissa Extension T HV P LV NV Exponent
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 12/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS CIS Information(Continued)
Offset 00BCh 00BEh 00C0h 00C2h Data 1Bh 0Ah C1h 41h 7 6 5 4 3 2 1 CISTPL_CFTABLE_ENTRY TPL_LINK Configuration Index P B Interface Type 0 Description Configuration Table Entry Tuple Link to next tuple Interface Byte Follows, Default Entry, Configuration Index = 1 I/O Interface; Bvd's and wProt not used; Ready active and Wait not used for memory cycles. Has Vcc, I/O, IRQ and Misc Info Nominal Voltage Only Follows Vcc Nominal is 5 Volts I/O : Range=0, Bus16=1, Bus8=1, IO AddrLines=4 Share=1, Pulse=1, Level=1, Mask=1 IRQ Level to be routed 0 - 15 recommended. Power Down, Twin Card supported. Configuration Table Entry Tuple Link to next tuple No Interface Byte, Non Default Entry, Configuration Index = 1 Has Vcc Info Nominal Voltage Only Follows Vcc Nominal is 3.3 Volts Configuration Table Entry Tuple Link to next tuple Interface Byte Follows, Default Entry, Configuration Index = 2 I/O Interface; Bvd's and wProt not used; Ready active and Wait not used for memory cycles. Has Vcc, I/O, IRQ and Misc Info Nominal Voltage Only Follows Vcc Nominal is 5 Volts I/O : Range=1, Bus16=1, Bus8=1, IO AddrLines=10 Number of Address Ranges = 2 Address Size = 2 Length Size = 1 First I/O Base Address = 1F0h First I/O Range is 8 Byte Length Second I/O Base Address = 3F6h Second I/O Range is 2 Byte Length Share=1, Pulse=1, Level=1, Mask=0, IRQ14 is recommended. Power Down, Twin Card supported. Configuration Table Entry Tuple Link to next tuple No Interface Byte, Non Default Entry, Configuration Index = 2 Has Vcc Info Nominal Voltage Only Follows Vcc Nominal is 3.3 Volts
I W
D R
00C4h 00C6h 00C8h 00CAh 00CCh 00CEh 00D0h 00D2h 00D4h 00D6h 00D8h 00DAh 00DCh 00DEh 00E0h 00E2h 00E4h 00E6h 00E8h
99h 01h 55h 64h F0h FFh FFh 21h 1Bh 05h 01h 01h 01h B5h 1Eh 1Bh 0Fh C2h 41h
M R X R S IRQ7 IRQ1 5 X
MS DI S P IRQ6 IRQ1 4 RFU
IR PI AI Mantissa E
IO SI
P LV NV Exponent IO AddrLines
T HV
I M R X
D
L M Level or Mask IRQ5 IRQ4 IRQ3 IRQ2 IRQ1 IRQ1 IRQ1 IRQ1 IRQ1 IRQ9 3 2 1 0 P RO A T CISTPL_CFTABLE_ENTRY TPL_LINK Configuration Index MS
IRQ0 IRQ8
DI
I W
D R
IR IO T P PI AI SI HV LV NV Mantissa Exponent Extension CISTPL_CFTABLE_ENTRY TPL_LINK Configuration Index P B Interface Type
00EAh 00ECh 00EEh 00F0h 00F2h
99h 01h 55h EAh 61h
M R X R LS
MS DI S
IR PI AI Mantissa E AS
IO SI
P LV NV Exponent IO AddrLines N Ranges
T HV
00F4h 00F6h 00F8h 00FAh 00FCh 00FEh 0100h 0102h 0104h 0106h 0108h 010Ah 010Ch 010Eh 0110h
F0h 01h 07h F6h 03h 01h EEh 21h 1Bh 05h 02h 01h 01h B5h 1Eh
S X
P RFU
First I/O Base Address (LSB) First I/O Base Address (MSB) First I/O Length minus 1 Second I/O Base Address (LSB) Second I/O Base Address (MSB) Second I/O Length minus 1 L M IRQ Level P RO A CISTPL_CFTABLE_ENTRY TPL_LINK Configuration Index MS IR IO PI AI SI Mantissa Extension T HV T
I M R X
D
DI
P LV NV Exponent
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 13/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS CIS Information(Continued)
Offset 0112h 0114h 0116h 0118h Data 1Bh 0Fh C3h 41h 7 6 5 4 3 2 1 CISTPL_CFTABLE_ENTRY TPL_LINK Configuration Index P B Interface Type 0 Description Configuration Table Entry Tuple Link to next tuple Interface Byte Follows, Default Entry, Configuration Index = 3 I/O Interface; Bvd's and wProt not used; Ready active and Wait not used for memory cycles. Has Vcc, I/O, IRQ and Misc Info Nominal Voltage Only Follows Vcc Nominal is 5 Volts I/O : Range=1, Bus16=1, Bus8=1, IO AddrLines=10 Number of Address Ranges = 2 Address Size = 2 Length Size = 1 First I/O Base Address = 170h First I/O Range is 8 Byte Length Second I/O Base Address = 376h Second I/O Range is 2 Byte Length Share=1, Pulse=1, Level=1, Mask=0, IRQ14 is recommended. Power Down, Twin Card supported. Configuration Table Entry Tuple Link to next tuple No Interface Byte, Non Default Entry, Configuration Index = 3 Has Vcc Info Nominal Voltage Only Follows Vcc Nominal is 3.3 Volts No Link Tuple Link to next tuple End of List Tuple
I W
D R
011Ah 011Ch 011Eh 0120h 0122h
99h 01h 55h EAh 61h
M R X R LS
MS DI S
IR PI AI Mantissa E AS
IO SI
P LV NV Exponent IO AddrLines N Ranges
T HV
0124h 0126h 0128h 012Ah 012Ch 012Eh 0130h 0132h 0134h 0136h 0138h 013Ah 013Ch 013Eh 0140h 0142h 0144h 0146h
70h 01h 07h 76h 03h 01h EEh 21h 1Bh 05h 03h 01h 01h B5h 1Eh 14h 00h FFh
S X
P RFU
First I/O Base Address (LSB) First I/O Base Address (MSB) First I/O Length minus 1 Second I/O Base Address (LSB) Second I/O Base Address (MSB) Second I/O Length minus 1 L M IRQ Level P RO A CISTPL_CFTABLE_ENTRY TPL_LINK Configuration Index MS IR IO T PI AI SI HV Mantissa Extension CISTPL_NO_LINK TPL_LINK CISTPL_END T
I M R X
D
DI
P LV NV Exponent
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 14/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS ATA Register Specifications Data Register
This register is a 16 bit register which is used to transfer data blocks between the card data buffer and the host. Data may be transferred by either a series of word accesses to the Data register or a series of byte accesses to the Data register.
D15 D14 D13 D12 D11 Data Word Odd Data Byte D4 D3 Data Word Data Byte D10 D9 D8
Sector Number Register
This register is written by the host with the starting sector number to be used in the subsequent CylinderHead-Sector command. After the command is complete, the host may read the final sector number from this register. When logical block addressing is used, this register is written by the host with bit7 to 0 of the starting logical block number and contains bit7 to 0 of the final logical block number after the command is complete.
D7 D2 D1 D0 D4 D3 D2 D1 Sector Number Logical Block Number bits A07-A00(LBA Addressing) D6 D5 D0
D7
D6
D5
Cylinder Low Register
This register is written by the host with the low-order byte of the starting cylinder address to be used in the subsequent Cylinder-Head-Sector command. After the command is complete, the host may read the low-order byte of the final cylinder number from this register. When logical block addressing is used, this register is written by the host with bits15 to 8 of the starting logical block number and contains bits15 to 8 of the final logical block number after the command complete.
D7 D4 D3 D2 D1 Cylinder Low Byte Logical Block Number bits A15-A08(LBA Addressing) D6 D5 D0
Error Register
This register contains additional information about the source of an error which has occurred in processing of the preceding command. This register should be checked by the host when ERR bit in the Status register is set. The Error register is a read only register.
D7 BBK Field BBK D6 UNC D5 0 D4 IDNF D3 0 D2 ABRT D1 0 D0 AMNF
UNC IDNF ABRT
AMNF
function This bit is set when a Bad Block is detected in requested ID field. Host can not read/write on data area that is marked as a Bad Block. This bit is set when Uncorrectable error is occurred at reading the card. The requested sector ID is in error or cannot be found. This bit is set if the command has been aborted because of the card status condition. (Not ready, Write fault, etc.) or when an invalid command has been issued. This bit is set in case of a general error.
Cylinder High Register
This register is written by the host with the high-order byte of the starting cylinder address to be used in the subsequent Cylinder-Head-Sector command. After the command is complete, the host may read the high-order byte of the final cylinder number from this register. When logical block addressing is used, this register is written by the host with bits 23 to 16 of the starting logical block number and contains bits23 to 16 of the final logical block number after the command is complete.
D7 D4 D3 D2 D1 Cylinder High Byte Logical Block Number bits A23-A16(LBA Addressing) D6 D5 D0
Feature Register
This register is written by the host to provide command specific information to the drive regarding features of the drive which the host wish to utilize. The Feature register is a write only register.
D7 D6 D5 D4 D3 Feature byte D2 D1 D0
Sector Count Register
This register is written by the host with the number of sectors or blocks to be processed in the subsequent command. After the command is complete, the host may read this register to obtain the count of sectors left unprocessed by the command.
D7 D6 D5 D4 D3 Sector Count D2 D1 D0
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 15/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS Drive/Head Register
The Drive/Head register is used to specify the selected drive of a pair of drives sharing a set of registers.
D7 X D6 LBA D5 X D4 DRV D3 HS3 LBA27 D2 HS2 LBA26 D1 HS1 LBA25 D0 HS0 LBA24
Device Control Register
This register is used to control the card interrupt request and to issue a soft reset to the card. The Device Control register is a write only register.
D7 X Field X 1 SRST D6 X D5 X D4 X D3 1 D2 SRST D1 nIEN D0 0
Field X LBA DRV
HS3-0 LBA27-24
function Undefined . "0" or "1". This bit is "0" for CHS addressing and "1" for Logical Block addressing. This bit is number of the drive which the host has selected. When DRV is cleared, Drive0 is selected. When DRV is set, Drive1 is selected. The card is selected to be Drive0 or to be Drive1 using the "Copy" field of the PC Card Socket Copy Register. HS3-0 of the head number in CHS addressing or LBA27-24 of the Logical Block Number in LBA addressing.
function don't care. This bit is set to "1". This bit is set to "1" in order to force the card to perform a Command Block Reset operation. This does not change the Card Configuration registers as a Hardware Reset does. The card remains in Reset until this bit is reset to
"0".
nIEN
0
This bit is used for enabling IREQ#. When this bit is set to "0", IREQ# is enabled. When this bit is set to "1", IREQ# is disabled. This bit is set to "0".
Status and Alternate Status Registers
The Status register and the Alternate Status register return the card status when read by the host. Reading the Status register clears a pending interrupt request while reading the Alternate Status register does not. The Status register and the Alternate Status register are read only registers.
D7 BSY Field BSY D6 DRDY D5 DWF D4 DSC D3 DRQ D2 CORR D1 IDX D0 ERR
Drive Address Register
This register is provided for compatibility with the AT disk drive interface.
D7 X D6 nWT G D5 D4 D3 nHS3-0 D2 D1 nDS1 D0 nDS0
DRDY DWF DSC DRQ CORR IDX ERR
function This bit is set when the card internal operation is executing. When this bit is set to "1", other bits in this register are invalid. DRDY indicates whether the card is capable of performing card operations. This bit, if set, indicates a write fault has occurred. This bit is set when the drive seek complete. This bit is set when the information can be transferred between the host and Data register. This bit is set when a correctable data error has been occurred and the data has been corrected. This bit is always set to "0". This bit is set when the previous command has ended in some type of error. The error information is set in the other Status register bits or Error register. This bit is cleared by the next command.
Field X nWTG nHS3-0 nDS1 nDS0
function This bit is unknown. This bit is set to "0" when a Flash write operation is in progress, otherwise it is set to "1". These bits is the negative value of Head Select bits in Drive/Head register. This bit is set to "0" when Slave drive is active and selected. This bit is set to "0" when Master drive is active and selected.
Command Register
The Command register contains the command code being sent to the device. Command execution begins immediately after this register is written. The Command register is a write only register.
D7 D6 D5 D4 D3 Command D2 D1 D0
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 16/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS ATA Command Specifications
This table summarizes the ATA command set with the paragraphs. Following shows the support commands and command codes which are written in command registers. Command Check Power Mode Execute Drive Diagnostic Erase Sector(s) Format Track Identify Drive Idle Idle Immediate Initialize Drive Parameters Read Buffer Read Long Sector Read Multiple Read Sector(s) Read Verify Sector(s) Recalibrate Request Sense Seek Set Features Set Multiple mode Set Sleep Mode Standby Standby Immediate Translate Sector Wear Level Write Buffer Write Long Sector Write Multiple Write Multiple without Erase Write Sector(s) Write Sector without Erase Write Verify FR : Feature Register, SN : Sector Number Register, DR Drive bit of Drive/Head Register, Code 98h, E5h 90h C0h 50h ECh 97h, E3h 95h, E1h 91h E4h 22h, 23h C4h 20h, 21h 40h, 41h 1xh 03h 7xh EFh C6h 99h, E6h 96h, E2h 94h, E0h 87h F5h E8h 32h, 33h C5h CDh 30h, 31h 38h 3Ch FR SC SN CY DR y y y y y y y y y y y y y y y y y y y y y y y y y y y y y y HD
y y y y
y
y y
y y
y y y y y
y y y
y y y y
y y y y
y y y y
y
y
y
y
y
y
y y y y y y y y y y y y y y y y y SC : Sector Count Register, CY : Cylinder Low/High Register, HD : Head No. of Drive/Head Register,
y y y y y y
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 17/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS Check Power Mode(98h, E5h)
This command checks the power mode.
Read Multiple(C4h)
This command performs similarly to the Read Sector(s) command. Interrupt are not generated on each sector, but on the transfer of a block which contains the number of sectors defined by a Set Multiple command.
Execute Drive Diagnostic(90h)
This command performs the internal diagnostic tests implemented by the card.
Read Sector(s)(20h, 21h) Erase Sector(s)(C0h)
This command is used to pre-erase and condition data sectors in advance of a Write without Erase or Write Multiple without Erase command. This command transfers data from the card to the host. Data transfer starts at the sector specified by the Cylinder, Head, and Sector Number registers, and proceeds for the number of sectors specified in the Sector Count register.
Format Track(50h)
This command writes the desired head and cylinder of the selected drive with a FFh pattern.
Read Verify Sector(s)(40h, 41h)
This command is identical to the Read Sector(s) command, except that DRQ is not asserted, and no data is transferred to the host.
Identify Drive(ECh)
This command enables the host to receive parameter information from the card. (Refer to the Identify Drive Information table.)
Recalibrate(1xh)
Although this command is supported for backward compatibility, it has no actual function. The card will always return good status at the completion of this command.
Idle(97h, E3h)
This command causes the card to set BSY, enter the Idle mode, clear BSY and generate an interrupt. If the sector count is non-zero, the automatic power down mode is enabled. If the sector count is zero, the automatic power down mode is disabled.
Request Sense(03h)
This command requests extended error information for the previous command.
Idle Immediate(95h, E1h)
This command causes the card to set BSY, enter the idle mode, clear BSY and generate an interrupt.
Seek(7xh)
This command is supported for backward compatibility. Although this command has no actual function, it does perform a range check of valid track, and posts an IDNF error if the Head or Cylinder specified are out of bounds.
Initialize Drive Parameters(91h)
This command allows the host to alter the number of sectors per track and the number of heads per cylinder.
Set Features(EFh)
This command is used by the host to establish or select certain features.
Read Buffer(E4h)
This command enables the host to read the current contents of the card's sector buffer.
Set Multiple Mode(C6h)
This command enables the card to perform Read and Write Multiple operations and establishes the block count for these commands. This card supports 1 sector block size.
Read Long Sector(22h, 23h)
This command is similar to the Read Sector(s) command except the contents of the Sector Count register are ignored and only one sector is read. The 512 data bytes and 4 ECC bytes are read into the buffer(with no ECC correction) and then transferred to the host.
Set Sleep Mode(99h, E6h)
This command causes the card to set BSY, enter the Sleep mode, clear BSY and generate an interrupt.
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 18/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS Standby(96h, E2h)
This command causes the card to set BSY, enter the Standby mode, clear BSY and generate an interrupt.
Write Sector(s)(30h, 31h)
This command transfers data from the host to the card. Data transfer starts at the sector specified by the Cylinder, Head, and Sector Number registers, and proceeds for the number of sectors specified in the Sector Count register.
Standby Immediate(94h, E0h)
This command causes the card to set BSY, enter the Standby mode, clear BSY and generate an interrupt.
Write Sector without Erase(CDh) Translate Sector(87h) This command allows the host to know the number of times an user sector has been erased and programmed. This card doesn't support the Hot Count value.
This command is similar to the Write Sector(s) command. The sectors should be pre-erased with the Erase Sector command before this command is issued. If the sector is not pre-erased, Write Sector command operation will occur.
Write Verify(3Ch) Wear Leveling(F5h)
Although this command is supported for backward compatibility, it has no actual function. The card will always return good status at the completion of this command. This command is similar to the Write Sector(s) command, except each sector is verified immediately after being written.
Write Buffer(E8h)
This command enables the host to overwrite contents of the card's sector buffer with any data pattern desired. This command has the same protocol as the Write Sector(s) command and transfers 512 bytes.
Write Long Sector(32h, 33h)
This command is similar to the Write Sector(s) except the contents of the Sector Count register are ignored and only one sector is written. The 512 data bytes and 4 ECC bytes are transferred from the host and then written from the buffer to the flash.
Write Multiple(C5h)
This command is similar to the Write Sector(s) command. Interrupts are not presented on each sector, but on the transfer of a block which contains the number of sectors defined by Set Multiple command.
Write Multiple without Erase(CDh)
This command is similar to the Write Multiple command. The sectors should be pre-erased with the Erase Sector command before this command is issued. If the sector is not pre-erased, Write Multiple command operation will occur.
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 19/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS Identify Drive Information
Word Address 0 Data 848Ah Description General configuration bit-significant information 15 1 Non-rotating disk drive 14 0 Format speed tolerance gap not required 13 0 Track offset option not available 12 0 Data strobe offset option not available 11 0 Rotational speed tolerance is < 0.5% 10 1 Disk transfer rate > 10Mbs 9 0 10Mbs <= Disk transfer rate > 5Mbs 8 0 Disk transfer rate <= 5Mbs 7 1 Removable cartridge drive 6 0 Not a fixed drive 5 0 Spindle motor control option not implemented 4 0 Head switch time > 15us 3 1 Not MFM encoded 2 0 Not soft sectored 1 1 Hard sectored 0 0 Reserved Number of Cylinders Reserved Number of Heads Number of unformatted bytes per track Number of unformatted bytes per sector Number of sectors per track Number of sectors per card (word 7 = MSW, word 8 = LSW) Reserved Reserved Buffer type: Single ported, single-sector, w/o read cache Buffer size, in 512 byte increments ECC length used on Read and Write Long command Firmware revision, 8 ASCII characters Model number, 40 ASCII characters. Maximum Block Count=1 for Read/write Multiple commands Cannot perform doubleword I/O Capabilities: LBA supported, DMA not supported Reserved PIO timing cycle timing mode 2 DMA transfer not supported Words 54-58 are valid Number of Current Cylinders Number of Current Heads Number of Current Sectors per Track LSW of the Current Capacity in Sectors MSW of the Current Capacity in Sectors Current Setting for Block Count for R/W Multiple commands LSW of the total number of user addressable LBA mode MSW of the total number of user addressable LBA mode Reserved
1 2 3 4 5 6 7-8 9 10-19 20 21 22 23-26 27-46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62-255
xxxxh 0000h 000xh 0000h 0200h 0020h xxxxh, xxxxh 0000h 2020h 0001h 0001h 0004h xxxxh xxxxh 0001h 0000h 0200h 0000h 0200h 0000h 0001h xxxxh xxxxh xxxxh xxxxh xxxxh 010xh xxxxh xxxxh 0000h
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 20/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS ABSOLUTE MAXIMUM RATINGS
Symbol VCC Vi Vo Pd Topr Tstg Parameter Supply voltage Input voltage Output voltage Power dissipation Operating temperature Storage temperature Conditions With respect to GND Ta = 25 C Ratings -0.3~6.2 -0.3~VCC+0.3 -0.3~VCC+0.3 1.2 0~60 -10~80 Unit V V V W C C
RECOMMENDED OPERATING CONDITIONS
Symbol VCC(5V) VCC(3.3V) GND VIH VIL Parameter VCC Supply voltage VCC Supply voltage System ground High input voltage Low input voltage Min. 4.5 3.135 0.7VCC 0 Limits Typ. 5.0 3.3 0 Max. 5.5 3.465 VCC 0.8 Unit V V V V V
DC ELECTRICAL CHARACTERISTICS (Ta=0~60C, VCC=5V10% or VCC=3.3V5%, unless otherwise noted)
Symbol Parameter Test Condition Min. 3.135V VOH High output voltage
IOH=2.5mA (3.135V) 4mA (4.5V) READY, INPACK#, BVD1, BVD2 the other outputs READY, INPACK#, BVD1, BVD2 the other outputs D15-D0
Limits Typ. 4.5V 3.3V 5.0V
Max. 3.465V 5.5V
Uni t
0.8VCC
-
V
VOL
Low output voltage
IOH=5mA (3.135V) 8mA (4.5V) IOL=-2.5mA (3.135V) -4mA (4.5V)
-
0.4
V
IOL=-5mA (3.135V) -8mA (4.5V)
IOZ ICCR ICCW ICCS
Output current in off state Active supply current (Read) Active supply current (Write) Standby current (auto power down)
CE1# = CE2# = VIH Output open
75 75
10 100 100
A mA mA
CE1# = CE2# = Vcc, D15-D0 = GND, RESET= GND(PC card mode) / = Vcc (True IDE mode), other inputs = Vcc or GND
600
800
1000
1500
A
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 21/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS DC ELECTRICAL CHARACTERISTICS(Continued)
Symbol Parameter Test Condition Min. 3.135V 4.5V Limits Typ. Max. 3.465V 5.5V Uni t
IIH
High input current
VIN=VCC
-10
+10
VIN=GND IIL Low input current PC card mode
VIN=GND IDE mode
CE1#,CE2#, OE#,WE#, REG#, IORD#,IOWR# RESET A10-A0, D15-D0, CSEL CE1#,CE2#, IORD#,IOWR#, A10-A0, D15-D0 OE#,WE#, REG#, BVD1,BVD2, RESET CSEL
-10
-30
-40
-100
-10
+10
A
-10
+10
-10
-30
-40
-100
-10
-10
-20
-50
CAPACITANCE
Symbol Parameter Test Condition CI Input capacitance VI=GND, Vi=25mVrms, f=1 MHZ, Ta=25C CO Output capacitance VO=GND, Vo=25mVrms, f=1 MHZ, Ta=25C Note : These parameters are not 100% tested. Min. Limits Typ. Max. 45 45 Unit pF
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 22/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS AC ELECTRICAL CHARACTERISTICS MEMORY TIMING Read Cycle[Attribute and Common]
(Ta=0~60C, VCC=5V10% or VCC=3.3V5% unless otherwise noted) Limits Typ.
Symbol tcR ta(A) ta(CE) tsu(A) th(A) tsu(CE) th(CE) ta(OE) tdis(CE) tdis(OE) ten(CE) ten(OE) tV(A) Read cycle time Address access time Card enable access time Address setup time Address hold time CE setup time CE hold time
Parameter
Min. 250
Max. 250 250
Unit ns ns ns ns ns ns ns
30 20 0 20 125 100 100 5 5 0
Output enable access time Output disable time (from CE) Output disable time (from OE) Output enable time (from CE) Output enable time (from OE) Data valid time (after address change)
ns ns ns ns ns ns
Write Cycle[Attribute and Common] (Ta=0~60C, VCC=5V10% or VCC=3.3V5% unless otherwise noted)
Limits Typ.
Symbol tcW tw(WE) tsu(A) th(A) tsu(CE) th(CE) tsu(A-WEH) tsu(CE-WEH) tsu(D-WEH) th(D) trec(WE) tdis(WE) tdis(OE) ten(WE) ten(OE) tsu(OE-WE) th(OE-WE) Write cycle time Write pulse width Address setup time Address hold time CE setup time CE hold time
Parameter
Min. 250 150 30 20 0 20 180 180 80 30 30
Max.
Unit ns ns ns ns ns ns ns ns ns ns ns
Address setup time with respect to WE high Card enable setup time with respect to WE high Data setup time with respect to WE high Data hold time Write recovery time Output disable time (from WE) Output disable time (from OE) Output enable time (from WE) Output enable time (from OE) OE set up time with respect to WE low OE hold time with respect to WE high
100 100 5 5 10 10
ns ns ns ns ns ns
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 23/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS MEMORY TIMING DIAGRAM Read Cycle
tcR
VIH An, REG# VIL VIH CE# VIL
ten(CE) tdis(CE)
th(CE) tsu(A) ta(A) tsu(CE) th(A) ta(CE)
tV(A)
VIH OE# VIL
ten(OE)
ta(OE)
tdis(OE)
VOH Dm (DOUT) VOL
Hi-Z OUTPUT VALID WE# ="H" level Note:
Indicates the don't care input
Write Cycle
tcW
VIH An, REG# VIL
tSU(CE-WEH) th(A)
VIH CE# VIL VIH OE# VIL
tSU(A)
tSU(CE) tSU(A-WEH) th(CE)
tW(WE)
trec(WE)
WE#
VIH VIL tSU(OE-WE)
Hi-Z tSU(D-WEH) th(D) th(OE-WE)
Dm (DIN)
VIH VIL
DATA INPUT STABLE
tdis(OE) tdis(WE) Hi-Z ten(OE) ten(WE)
VOH Dm (DOUT) VOL
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 24/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS I/O READ (INPUT) TIMING
Limit Symbol Parameter Min Max 100 Unit ns ns ns ns ns ns ns ns ns ns ns ns ns td(IORD) Data Delay after IORD# th(IORD) Data Hold following IORD# 0 tw(IORD) IORD# Width Time 165 tsuA(IORD) Address Setup before IORD# 70 thA(IORD) Address Hold following IORD# 20 tsuCE(IORD) CE# Setup before IORD# 5 thCE(IORD) CE# Hold following IORD# 20 tsuREG(IORD) REG# Setup before IORD# 5 thREG(IORD) REG# Hold following IORD# 0 tdfINPACK(IORD) INPACK# Delay Falling from IORD# 0 tdrINPACK(IORD) INPACK# Delay Rising from IORD# tdfIOIS16(ADR) IOIS16# Delay Falling from Address tdrIOIS16(ADR) IOIS16# Delay Rising from Address The maximum load on INPACK# and IOIS16# are 1 LSTTL with 50 pF total load.
45 45 35 35
I/O WRITE (OUTPUT) TIMING
Limit Symbol Parameter Min Max Unit ns ns ns ns ns ns ns ns ns ns ns tsu(IOWR) Data Setup before IOWR# 60 th(IOWR) Data Hold following IOWR# 30 tw(IOWR) IOWR# Width Time 165 tsuA(IOWR) Address Setup before IOWR# 70 thA(IOWR) Address Hold following IOWR# 20 tsuCE(IOWR) CE# Setup before IOWR# 5 thCE(IOWR) CE# Hold following IOWR# 20 tsuREG(IOWR) REG# Setup before IOWR# 5 thREG(IOWR) REG# Hold following IOWR# 0 tdfIOIS16(ADR) IOIS16# Delay Falling from Address tdrIOIS16(ADR) IOIS16# Delay Rising from Address The maximum load on INPACK# and IOIS16# are 1 LSTTL with 50 pF total load.
35 35
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 25/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS I/O READ (INPUT) TIMING DIAGRAM
An thA(IORD) tsuREG(IORD) REG# thREG(IORD)
CE#
tsuCE(IORD) tw(IORD)
thCE(IORD)
IORD# tsuA(IORD) INPACK# tdf INPACK(IORD) IOIS16# tdfIOIS16(ADR) D[15::0] td(IORD) th(IORD) tdrIOIS16(ADR) tdrINPACK(ADR)
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 26/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS I/O WRITE (OUTPUT) TIMING DIAGRAM
An thA(IOWR) tsuREG(IOWR) REG# thREG(IOWR)
CE#
tsuCE(IOWR)
thCE(IOWR) tw(IOWR)
IOWR# tsu A(IOWR) IOIS16# tdfIOIS16(ADR) D[15::0] tsu(IOWR) th(IOWR) tdrIOIS16(ADR)
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 27/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS True IDE TIMING True IDE I/O READ (INPUT) TIMING
Limit Symbol Parameter Min 5 80 30 10 5 10 35 35 Max 60 Unit ns ns ns ns ns ns ns ns ns td(IORD) Data Delay after IORD# th(IORD) Data Hold following IORD# tw(IORD) IORD# Width Time tsuA(IORD) Address Setup before IORD# thA(IORD) Address Hold following IORD# tsuCS(IORD) CS# Setup before IORD# thCS(IORD) CS# Hold following IORD# tdfIOCS16(ADR) IOCS16# Delay Falling from Address tdrIOCS16(ADR) IOCS16# Delay Rising from Address The maximum load on IOCS16# are 1 LSTTL with 50 pF total load.
True IDE I/O WRITE (OUTPUT) TIMING
Limit Symbol Parameter Min 30 10 80 30 10 5 10 35 35 Max Unit ns ns ns ns ns ns ns ns ns tsu(IOWR) Data Setup before IOWR# th(IOWR) Data Hold following IOWR# tw(IOWR) IOWR# Width Time tsuA(IOWR) Address Setup before IOWR# thA(IOWR) Address Hold following IOWR# tsuCS(IOWR) CS# Setup before IOWR# thCS(IOWR) CS# Hold following IOWR# tdfIOCS16(ADR) IOCS16# Delay Falling from Address tdrIOCS16(ADR) IOCS16# Delay Rising from Address The maximum load on IOCS16# are 1 LSTTL with 50 pF total load.
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 28/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS True IDE I/O READ (INPUT) TIMING DIAGRAM
An thA(IORD) CS# tsuCS(IORD) tw(IORD) IORD# tsuA(IORD) IOCS16# tdfIOCS16(ADR) D[15::0] td(IORD) th(IORD) tdrIOCS16(ADR) thCS(IORD)
True IDE I/O WRITE (OUTPUT) TIMING DIAGRAM
An thA(IOWR) CS# tsuCS(IOWR) tw(IOWR) IOWR# tsuA(IOWR) IOCS16# tdf IOCS16(ADR) D[15::0] tsu(IOWR) th (IOWR) tdrIOCS16(ADR) thCS(IOWR)
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 29/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS RECOMMENDED POWER UP/DOWN CONDITIONS (Ta=0~60C, unless otherwise noted)
Symbol Vi(CE) tsu(Vcc) tsu(RESET) trec(Vcc) tpr tpf tw(RESET) th(Hi-zRESET) ts(Hi-zRESET) Parameter CE input voltage CE setup time RESET setup time CE recover time Vcc rising time VCC falling time RESET width Conditions 0V VCC <2V 2V VCC 10%a90% of Vcc 90% of Vcca10%
100 300
POWER UP/DOWN TIMING DIAGRAM
tpr VCC @ 90% VIH VCC @ 10% 2V
tsu(VCC) VCC tsu(RESET) tsu (RESET)
CE1#, CE2# th(Hi-z RESET) tw(RESET)
Hi-z tw(RESET) VCC VCC @ 90% trec(VCC) 2V CE1#, CE2# ts(Hi-z RESET) RESET tpf
RESET
VIH VCC @ 10%
Hi-z
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 30/31
MITSUBISHI STORAGE CARD
MF0XXXX-04BAXX series
CompactFlash CARDS
* Mitsubishi Electric Corporation puts the maximum effort into making semiconductor products better and more reliable, but there is always the possibility that trouble may occur with them. Trouble with semiconductors may lead to personal injury, fire or property damage. Remember to give due consideration to safety when making your circuit designs, with appropriate measures such as (i) placement of substitutive, auxiliary circuits, (ii) use of non-flammable material or (iii) prevention against any malfunction or mishap.
Keep safty first in your circuit designs!
Notes regarding these materials
*These materialscircuit designs! are intended as a reference to assist our customers in the selection of the Mitsubishi semiconductor product best suited to the customer's application; they do not convey any license under any intellectual property rights, or any other rights, belonging to Mitsubishi Electric Corporation or a third party. *Mitsubishi Electric Corporation assumes no responsibility for any damage, or infringement of any third-party's rights, originating in the use of any product data, diagrams, charts, programs, algorithms, or circuit application examples contained in these materials. *All information contained in these materials, including product data, diagrams, charts, programs and algorithms represents information on products at the time of publication of these materials, and are subject to change by Mitsubishi Electric Corporation without notice due to product improvements or other reasons. It is therefore recommended that customers contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for the latest product information before purchasing a product listed herein. The information described here may contain technical inaccuracies or typographical errors. Mitsubishi Electric Corporation assumes no responsibility for any damage, liability, or other loss rising from these inaccuracies or errors. Please also pay attention to information published by Mitsubishi Electric Corporation by various means, including the Mitsubishi Semiconductor home page (http://www.mitsubishichips.com/). *When using any or all of the information contained in these materials, including product data, diagrams, charts, programs, and algorithms, please be sure to evaluate all information as a total system before making a final decision on the applicability of the information and products. Mitsubishi Electric Corporation assumes no responsibility for any damage, liability or other loss resulting from the information contained herein. *Mitsubishi Electric Corporation semiconductors are not designed or manufactured for use in a device or system that is used under circumstances in which human life is potentially at stake. Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor when considering the use of a product contained herein for any specific purposes, such as apparatus or systems for transportation, vehicular, medical, aerospace, nuclear, or undersea repeater use. *The prior written approval of Mitsubishi Electric Corporation is necessary to reprint or reproduce in whole or in part these materials. *If these products or technologies are subject to the Japanese export control restrictions, they must be exported under a license from the Japanese government and cannot be imported into a country other than the approved destination. Any diversion or reexport contrary to the export control laws and regulations of Japan and/or the country of destination is prohibited. *Please contact Mitsubishi Electric Corporation or an authorized Mitsubishi Semiconductor product distributor for further details on these materials or the products contained therein.
Jun.2000. Rev. 1.1 MITSUBISHI ELECTRIC 31/31

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